Modern communications systems are required to transmit data at high rates. Due to the high transfer rates, many communications systems employ error-control code to enhance system performance. For example, a circuit may regularly use convolutional codes for error correction to achieve reliable data transfer, such as in wireless communications and digital video. Convolutional codes are popular for their error correction capacity and reasonable coding simplicity. Convolutional codes are regularly used in digital communications standards, such as, for example, DVB-T (Digital Video Broadcast—Terrestrial) and ISDB-T (Integrated Service Digital Broadcasting—Terrestrial).
The Viterbi algorithm may be one of the best algorithms for decoding convolutional codes, especially with constrained resources, which may include factors like a small amount of memory or limited area on an integrated circuit (IC) chip; however, the Viterbi algorithm is computationally intensive. The Viterbi algorithm, a dynamic programming algorithm finding the most likely sequence of hidden states (the Viterbi path) that results in a sequence of observed events, is usually used to decode convolutional codes in the form of a Viterbi decoder. The Viterbi decoder is usually a hardware implementation that takes one or more input bits and outputs decoded bits. As the data rate requirements increase in modern wireless applications, system complexity and power consumption issues involved with the Viterbi algorithm and the Viterbi decoder become greater issues.
Of the components that constitute a Viterbi decoder, the Add-Compare-Select Unit (ACSU) and Survivor Path Storage Unit (SPSU) usually consume the most power. For example, the ACSU may consume a great amount of power due to calculations relating to updating branch metrics at a high clock frequency, whereas the SPSU may have high power consumption due to a large number of memory accesses and rewrites. However, the power consumption of the SPSU depends greatly upon the method the SPSU employs, as there are multiple methods to implement the SPSU's function of constructing the Viterbi path. For example, the trace back (TB) method for the SPSU stores a trace back bit to indicate which of a plurality of incoming previous states for a given state was selected as the optimal branch in the add-compare-select (ACS) operation performed by the ACSU. Another method, the register exchange (RE) method, keeps multiple sets of Viterbi paths, which may also be known as survivor paths, in the SPSU and appends new sequence information onto the stored survivor path. The SPSU appends the stored survivor path by copying a “new” survivor path from an “old” survivor path. The new and old survivor paths are identical, except that the new survivor path extends the old survivor path with the new bit corresponding to the chosen previous state and may discard the oldest bit in the survivor path if the survivor path is of a discrete length.
The register exchange (RE) method for the SPSU has a number of advantages over the trace back (TB) method, most notably its high speed, simple architecture and control, and low latency. However, a major drawback to the RE method is its high power consumption, which is due to the copying of entire old survivor paths to create new survivor paths for each decoded bit received by the SPSU. Due to the high power consumption associated with the RE method, modern applications with power concerns, such as those in wireless communications, have more often used Viterbi decoders that implemented the TB method in their SPSUs, as Viterbi decoders using the TB method have lower power consumption and require only a limited memory bandwidth because the SPSU using the TB method only stores one copy of trace back bits for each state in the survivor path. However, the TB method requires higher decoder complexity in order to execute the recursive trace backs that reconstruct the entire survivor path to produce the entire decoded sequence.
In view of the foregoing, it would be desirable lower power consumption in Viterbi decoders.